发明名称 |
COMMON PLATFORM FOR ONE-LEVEL MEMORY ARCHITECTURE AND TWO-LEVEL MEMORY ARCHITECTURE |
摘要 |
Technologies for one-level memory (1LM) and two-level memory (2LM) configurations in a common platform are described. A processor includes a first memory interface coupled to a first memory device that is located off-package of the processor and a second memory interface coupled to a second memory device that is located off-package of the processor. The processor also includes a multi-level memory controller (MLMC) coupled to the first memory interface and the second memory interface. The MLMC includes a first configuration and a second configuration. The first memory device is a random access memory (RAM) of a one-level memory (1LM) architecture in the first configuration. The first memory device is a first-level RAM of a two-level memory (2LM) architecture in the second configuration and the second memory device is a second-level non-volatile memory (NVM) of the 2LM architecture in the second configuration. |
申请公布号 |
US2015178204(A1) |
申请公布日期 |
2015.06.25 |
申请号 |
US201314140261 |
申请日期 |
2013.12.24 |
申请人 |
Ray Joydeep;George Varghese;Sodhi Inder M.;Wilcox Jeffrey R. |
发明人 |
Ray Joydeep;George Varghese;Sodhi Inder M.;Wilcox Jeffrey R. |
分类号 |
G06F12/08;G06F12/06;G06F12/02 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
1. A processor comprising:
a first memory interface coupled to a first memory device that is located off-package of the processor; a second memory interface coupled to a second memory device that is located off-package of the processor; a multi-level memory controller (MLMC) coupled to the first memory interface and the second memory interface, wherein the MLMC comprises a first configuration and a second configuration, wherein the first memory device is a random access memory (RAM) of a one-level memory (1LM) architecture in the first configuration, wherein the first memory device is a first-level RAM of a two-level memory (2LM) architecture in the second configuration and the second memory device is a second-level non-volatile memory (NVM) of the 2LM architecture in the second configuration. |
地址 |
Folsom CA US |