| 摘要 |
Method, apparatus, and program means for performing a string comparison operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store a result of a comparison between each data element of a first and second operand corresponding to a first and second text string, respectively. |
| 主权项 |
1. A processor comprising:
a first logic to fetch a compare instruction; a decoder logic to decode the compare instruction; a plurality of 64-bit single-instruction multiple data (SIMD) floating point data registers, including:
a first and second 64-bit SIMD floating point data register to store a first and second 64-bit SIMD floating point operand, respectively, each of the first and second 64-bit SIMD floating point operands to include two 32-bit floating point data elements; anda 64-bit SIMD destination register, into which at least one result of performing the compare instruction is to be stored, wherein the first and second 64-bit floating point data registers and the 64-bit SIMD destination register are to be identified by a first and second SIMD operand field and a SIMD destination field, respectively, within the compare instruction; and a plurality of execution units, wherein at least one execution unit of the plurality of execution units is to execute the compare instruction, wherein the compare instruction is to cause the processor to:
determine whether each of the 32-bit floating point data elements of the first and second SIMD floating point operands is valid,compare only valid 32-bit floating point data elements of the first 64-bit SIMD floating point operand with only valid 32-bit floating point data elements of the second 64-bit SIMD floating point operand, wherein the valid 32-bit floating point data elements of the first 64-bit SIMD floating point operand to be compared with the valid 32-bit floating point data elements of the second 64-bit SIMD floating point operand are in the same data element position, andstore a plurality of indicators of whether the compared valid 32-bit floating point data elements of the first 64-bit SIMD floating point operand and the valid 32-bit floating point data elements of the second 64-bit SIMD floating point operand are equal. |
