| 摘要 |
The present invention relates to the technical field of very large scale integrated circuit manufacturing. A method for manufacturing a quasi-SOI source/drain multi-gate device, the method sequentially comprising the following steps: forming a Fin strip shaped active region (4) on a first semiconductor substrate (1); forming an STI isolation layer (5); depositing a gate dielectric layer (6) and a gate material layer (7) to form a gate stack layer structure; forming a doped structure of a source/drain extension region; forming a recessed source/drain structure (10, 11, 13); forming a quasi-SOI source/drain isolation layer (14); conducting in-situ doping extension on a second semiconductor material source/drain (15), and conducting annealing and activation; removing a false gate, and re-depositing a high-k metal gate (17); and forming contact and metal interconnection. The method effectively reduces leakage current, reduces device energy consumption, has a lower thermal budget and a simple process, is compatible with a traditional CMOS process, and can be applied to a semiconductor material in addition to silicon, and to the manufacturing of a large-scale integrated circuit. |
