Testing of Semiconductor Components and Circuit Layouts Therefor

摘要

In one embodiment of the present invention, a method of forming a semiconductor device includes performing a test during the forming of the semiconductor device within and/or over a substrate. A first voltage is applied to a first node coupled to a component to be tested in the substrate and a test voltage at a pad coupled to the component to be tested through a second node. The test voltage has a peak voltage higher than the first voltage. The component to be tested is coupled between the first node and the second node. A leakage current is measured through the component to be tested in response to the test voltage. After performing the test, the second node is connected to a functional block in the substrate. The first node is coupled to a third node coupled to the functional block.

主权项

1. A method of forming a semiconductor device, the method comprising:
performing a test during the forming of the semiconductor device within and/or over a substrate, the test comprising:
applying a first voltage to a first node coupled to a component to be tested in the substrate and a test voltage at a pad coupled to the component to be tested through a second node, wherein the test voltage has a peak voltage higher than the first voltage, wherein the component to be tested is coupled between the first node and the second node, andmeasuring a leakage current through the component to be tested in response to the test voltage; and after performing the test, connecting the second node to a functional block in the substrate, wherein the first node is coupled to a third node coupled to the functional block.