发明名称 Magnetic Field Sensor And Related Techniques That Inject A Synthesized Error Correction Signal Into A Signal Channel To Result In Reduced Error
摘要 A magnetic field sensor has an error correction signal generator circuit to inject an error correction signal into a primary signal channel to cancel an error signal component in the primary signal channel.
申请公布号 US2015176963(A1) 申请公布日期 2015.06.25
申请号 US201314138840 申请日期 2013.12.23
申请人 Allegro Microsystems, LLC 发明人 Diaconu Aurelian;Metivier Ryan
分类号 G01B7/30 主分类号 G01B7/30
代理机构 代理人
主权项 1. A magnetic field sensor, comprising: a plurality of magnetic field sensing elements configured to generate a respective plurality of x-y output signals, wherein each one of the x-y output signals is responsive to a magnetic field in an x-y plane; a sequence switches circuit coupled to receive the plurality of x-y output signals and configured to generate a sequential signal comprised of sequential ones of the plurality of x-y output signals, wherein the sequential signal comprises a time waveform comprising an error component; an angle processing channel coupled to receive the sequential signal, wherein the angle processing channel comprises: an angle processing channel output node;an electronic filter having an input node and an output node, wherein the electronic filter is configured to generate a filtered signal at the output node of the electronic filter; anda summing circuit having first and second input nodes and an output node, wherein the first input node of the summing circuit is either coupled to receive a signal representative of the sequential signal or coupled to the output node of the electronic filter, wherein the output node of the summing circuit is either coupled to the input node of the electronic filter or coupled to the angle processing channel output node, wherein the magnetic field sensor further comprises: an error correction signal generator circuit having an output node, the error correction signal generator circuit for generating an error correction signal at the output node, wherein the output node of the error correction signal generator circuit is coupled to the second input node of the summing circuit, wherein the summing circuit is configured to generate a signal at the output node of the summing circuit with a corrected error component smaller than the error component of the sequential signal; and a sine look up table memory coupled to the error correction processor and configured to store a plurality of sine values, wherein the error correction signal is generated in accordance with selected ones of the sine values.
地址 Worcester MA US