发明名称 SOLID-STATE IMAGING ELEMENT AND CAMERA SYSTEM
摘要 A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.
申请公布号 US2015181138(A1) 申请公布日期 2015.06.25
申请号 US201514640913 申请日期 2015.03.06
申请人 Sony Corporation 发明人 Oike Yusuke
分类号 H04N5/341;H04N5/3745;H04N5/374 主分类号 H04N5/341
代理机构 代理人
主权项 1. An apparatus comprising: a solid-state imaging element; an optical system which forms an image of a subject on the solid-state imaging element; and a signal processing circuit which processes an output image signal of the solid-state imaging element, wherein, the solid-state imaging element includes (a) a first semiconductor layer including (i) a pixel array part having a plurality of pixel cells in a two-dimensional array, each of the pixel cells having a photoelectric conversion part and an amplifying circuit in a one-to-one relationship, and (ii) an output signal line configured to receive signals from a plurality of the amplifying circuits; (b) a second semiconductor layer stacked on the first semiconductor layer; and (c) a plurality of stack-connecting parts electrically connecting the first and second semiconductor layers,the plurality of pixel cells include a first set of pixel cells and a second set of pixel cells,the output signal line includes a first signal line and a second signal line,the first set of pixel cells share the first signal line and the second set of pixel cells share the second signal line in a column direction, respectively, andthe first and second signal lines are configured to be selectively connected and selectively disconnected to at least one of the stack connecting parts by a switch located between the output signal line and at least one of the stack connecting parts, the switch being located between predetermined neighboring pixel cells.
地址 Tokyo JP