METHOD FOR SHOWING HIERARCHICAL STRUCTURE FOR A GIVEN POWER INTENT DESCRIBED IN A POWER INTENT DESCRIPTION LANGUAGE WITH A DESIGN DESCRIBED IN A HARDWARE DESIGN DESCRIPTION LANGUAGE, AND ASSOCIATED APPARATUS AND ASSOCIATED COMPUTER PROGRAM PRODUCT

摘要

A method for showing hierarchical structure for a given power intent described in a power intent description language (e.g. a formal power intent description language) with a design described in a hardware design description language, an associated apparatus, and an associated computer program product are provided, where the method includes: retrieving hardware design description contents written in the hardware design description language from a hardware design description file, and retrieving power intent description contents written in the power intent description language from a power intent description file; and controlling a display module to display a power domain hierarchy associated with the power intent description contents and the hardware design description contents respectively retrieved from the power intent description file and the hardware design description file, wherein the power domain hierarchy includes at least one power domain. For example, the power intent description language is the unified power format (UPF) language.

主权项

1. A method for showing hierarchical structure for a given power intent described in a power intent description language with a design described in a hardware design description language, the method comprising the steps of:
retrieving hardware design description contents written in the hardware design description language from a hardware design description file, and retrieving power intent description contents written in the power intent description language from a power intent description file; and controlling a display module to display a power domain hierarchy associated with the power intent description contents and the hardware design description contents respectively retrieved from the power intent description file and the hardware design description file, wherein the power domain hierarchy comprises at least one power domain.