Methods and Systems for Switching Between Clocks

摘要

A clock signal for use by a circuit can be switched between clocks glitchlessly. A series of delay devices are connected in series based on an integral timing ratio. The integral timing ratio can be based on a ratio of the one of the clock's frequency or period to the other's frequency or period. When a clock select signal is received, the select signal is qualified and then delayed an amount of time based on the integral timing ratio, using the delay devices. The number of delay devices in each series can be the next largest integer to the integral timing ratio, plus one. The clock signal can then be glitchlessly switched from one clock to the other.

主权项

1. A method comprising:
determining an integral timing ratio; determining a first delay period based upon the integral timing ratio and the source clock period; determining a second delay period based upon the integral timing ratio and the target clock period; receiving a clock switch signal; generating a complement of the clock switch signal; qualifying the clock switch signal relative to the source clock to produce a qualified source clock switch signal; qualifying the complement of the clock switch signal relative to the target clock to produce a qualified target clock switch signal; delaying the qualified source clock switch signal a first delay period equal to at least the product of the integral timing ratio and the source clock period to produce a delayed source clock switch signal; and delaying the qualified target clock switch signal a second delay period equal to the product of the integral timing ratio and the target clock period to produce a delayed target clock switch signal.