发明名称 3D CLOCK DISTRIBUTION CIRCUITS AND METHODS
摘要 An integrated circuit includes a clock source tier and at least two clock distribution tiers disposed in a vertical stack with the clock source tier. The clock source tier includes a clock circuit. Each of the at least two clock distribution tiers includes a clock distribution circuit. Each clock distribution circuit includes at least one pair of cross-coupled inverters.
申请公布号 US2015180456(A1) 申请公布日期 2015.06.25
申请号 US201514636224 申请日期 2015.03.03
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 LIN Mu-Shan
分类号 H03K5/01;H03L7/00 主分类号 H03K5/01
代理机构 代理人
主权项 1. An integrated circuit, comprising: a clock source tier including a clock circuit; and at least two clock distribution tiers disposed in a vertical stack with the clock source tier, each of the at least two clock distribution tiers including a clock distribution circuit, wherein each clock distribution circuit includes at least one pair of cross-coupled inverters.
地址 Hsin-Chu TW