| 摘要 |
PROBLEM TO BE SOLVED: To provide systems and methods for performing a word line address scan in a semiconductor memory.SOLUTION: A system and method for performing three scans for testing address decoder and word line drive circuits are provided. A first scan determines whether only one word line is selected. A second scan determines whether the word line rise time to a target voltage level is within a specified time. Finally, a third scan determines whether a correct word line was selected. The present invention may realize all three scans or a combination of the three scans. |
