发明名称 Reconfigurable processor and method for processing loop having memory dependency
摘要 Provided are a reconfigurable processor, which is capable of reducing the probability of an incorrect computation by analyzing the dependence between memory access instructions and allocating the memory access instructions between a plurality of processing elements (PEs) based on the results of the analysis, and a method of controlling the reconfigurable processor. The reconfigurable processor extracts an execution trace from simulation results, and analyzes the memory dependence between instructions included in different iterations based on parts of the execution trace of memory access instructions.
申请公布号 US9063735(B2) 申请公布日期 2015.06.23
申请号 US201113272846 申请日期 2011.10.13
申请人 Samsung Electronics Co., Ltd. 发明人 Ahn Hee-Jin;Yoo Dong-Hoon;Egger Bernhard;Ahn Min-Wook;Lee Jin-Seok;Jin Tai-Song;Kim Won-Sub
分类号 G06F9/38;G06F9/32 主分类号 G06F9/38
代理机构 NSIP Law 代理人 NSIP Law
主权项 1. A reconfigurable processor configured to process a loop computation including instructions, the reconfigurable processor comprising: an extractor configured to extract an execution trace of memory access instructions from results of simulating the loop computation; and a scheduler configured to analyze a memory dependence between instructions included in different iterations of the loop computation based on at least part of the execution trace, to calculate a minimum iteration interval (MII) between the different iterations of the loop computation based on the analyzed memory dependence between the instructions included in different iterations of the loop computation, and to increase an iteration interval between the iterations of the loop computation from the calculated MII.
地址 Suwon-si KR