Interface for storage device access over memory bus

摘要

A nonvolatile storage or memory device is accessed over a memory bus. The memory bus has an electrical interface typically used for volatile memory devices. A controller coupled to the bus sends synchronous data access commands to the nonvolatile memory device, and reads the response from the device bus based on an expected timing of a reply from the nonvolatile memory device. The controller determines the expected timing based on when the command was sent, and characteristics of the nonvolatile memory device. The controller may not need all the electrical signal lines available on the memory bus, and could issue data access commands to different groups of nonvolatile memory devices over different groups of electrical signal lines. The memory bus may be available and configured for either use with a memory controller and volatile memory devices, or a storage controller and nonvolatile memory devices.

主权项

1. A bus controller device comprising:
an electrical hardware bus interface to connect to a device bus, the device bus to connect to a nonvolatile memory device; and device bus processing logic to read data from and write commands to the nonvolatile memory device over the device bus, wherein the processing logic is to
send a data access command over the device bus to the nonvolatile memory device connected to the device bus;determine an expected timing of a response to the data access command from the nonvolatile memory device based on when the command was sent and characteristic parameters of the nonvolatile memory device; andread the response from the nonvolatile memory device from the device bus based on the determined expected timing.