发明名称 Array substrate
摘要 An array substrate includes a substrate and a plurality of pixel structures. At least one pixel structure includes a gate electrode, a gate insulating layer, a source electrode and a drain electrode, a patterned semiconductor layer, a first passivation layer, and a transparent conductive pattern disposed in a pixel region of the substrate. The patterned semiconductor layer includes a first semiconductor pattern and a second semiconductor pattern. The first semiconductor pattern substantially corresponds to the gate electrode and covers a portion of the source electrode and a portion of the drain electrode. The second semiconductor pattern covers a portion of the drain electrode. The first passivation layer is disposed on the patterned semiconductor layer and has a first opening exposing a portion of the second semiconductor pattern. The transparent conductive pattern is disposed on the first passivation layer and electrically connected to the second semiconductor pattern through the first opening.
申请公布号 US9064749(B2) 申请公布日期 2015.06.23
申请号 US201414526460 申请日期 2014.10.28
申请人 AU Optronics Corp. 发明人 Chen Ming-Yao;Chen Pei-Ming
分类号 H01L27/12;H01L21/77 主分类号 H01L27/12
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. An array substrate, comprising: a substrate having a pixel region and a peripheral region adjacent to the pixel region; a plurality of pixel structures disposed in the pixel region, wherein at least one of the pixel structures comprises: a gate electrode, a gate insulating layer, a source electrode, and a drain electrode disposed in the pixel region of the substrate;a patterned semiconductor layer comprising: a first semiconductor pattern substantially corresponding to the gate electrode and covering a portion of the source electrode and a portion of the drain electrode; anda second semiconductor pattern covering a portion of the drain electrode; anda first passivation layer disposed on the patterned semiconductor layer, wherein the first passivation layer has a first opening exposing a portion of the second semiconductor pattern; anda transparent conductive pattern disposed on the first passivation layer and electrically connected to the second semiconductor pattern through the first opening.
地址 Science-Based Industrial Park, Hsin-Chu TW