发明名称 Semiconductor device and manufacturing method thereof
摘要 In a semiconductor device, a logic MOSFET and a switch MOSFET are formed in a high-resistance substrate. The logic MOSFET includes an epitaxial layer formed on the high-resistance substrate and a well layer formed on the epitaxial layer. The switch MOSFET includes a LOCOS oxide film formed on the high-resistance substrate, the LOCOS oxide film being sandwiched between trenches and thus having a mesa-shape in its upper part. The switch MOSFET further includes a buried oxide film and a SOI layer formed on the mesa-shape of the LOCOS oxide film. The upper surface of the mesa-shape of the LOCOS oxide film is positioned at the same height as the upper surface of the epitaxial layer.
申请公布号 US9064742(B2) 申请公布日期 2015.06.23
申请号 US201214007760 申请日期 2012.02.24
申请人 Renesas Electronics Corporation 发明人 Tamura Jun
分类号 H01L21/8238;H01L27/12;H01L21/762;H01L21/84 主分类号 H01L21/8238
代理机构 McGinn IP Law Group, PLLC 代理人 McGinn IP Law Group, PLLC
主权项 1. A semiconductor device comprising: a first MOSFET formed on a high-resistance substrate; and a second MOSFET that is monolithic-integrated with the first MOSFET on the high-resistance substrate, wherein the first MOSFET comprises: a first semiconductor layer formed on the high-resistance substrate; anda second semiconductor layer formed above the first semiconductor layer, the second semiconductor layer serving as a well layer of the first MOSFET, and the second MOSFET comprises: a first insulating layer formed on the high-resistance substrate, first insulating layer being sandwiched between two trenches and thus having a mesa-shape in its upper part, an upper surface of the mesa-shape being positioned at the same height as the first semiconductor layer;a second insulating layer formed on the mesa-shape of the first insulating layer; anda third semiconductor layer formed on the second insulating layer, the third semiconductor layer serving as a well layer of the second MOSFET.
地址 Kawasaki-shi, Kanagawa JP
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