发明名称 Method for manufacturing semiconductor devices
摘要 A method for reducing defects in an active device area of a semiconductor device during fabrication is disclosed. In one aspect, the method comprises providing the active device area adjacent an isolation structure, wherein a substantially planar surface is formed over the isolation structure and the active device area, forming a patterned stress-inducing layer over the substantially planar surface, forming at least one screening layer between the patterned stress-inducing layer and the substantially planar surface, where the screening layer is configured to screen part of the stress field induced by the patterned stress-inducing layer, performing an anneal process after forming the patterned stress-inducing layer on the substantially planar surface, so as to induce a movement of the defects towards a contact interface between the active device area and the isolation structure, and removing the patterned stress-inducing layer from the substantially planar surface.
申请公布号 US9064702(B2) 申请公布日期 2015.06.23
申请号 US201313956273 申请日期 2013.07.31
申请人 IMEC;GLOBALFOUNDRIES INC. 发明人 Brunco David;Eneman Geert
分类号 H01L21/31;H01L21/469;H01L21/02;H01L29/78;H01L21/324 主分类号 H01L21/31
代理机构 Knobbe, Martens, Olson & Bear LLP 代理人 Knobbe, Martens, Olson & Bear LLP
主权项 1. A method for reducing defects in an active device area of a semiconductor device during fabrication, comprising: providing a substantially planar surface comprising an active device area adjacent an isolation structure; forming a stress-inducing layer over the substantially planar surface and patterning to remove a portion of the stress-inducing layer from the active device area while leaving the stress-inducing layer over the isolation region, the patterned stress-inducing layer being configured to induce a stress field in the active device area, the induced stress field resulting in a shear stress being applied on defects present in the active device area; forming at least one screening layer between the patterned stress-inducing layer and the substantially planar surface, the screening layer being configured to screen part of the stress field induced by the patterned stress-inducing layer; performing an anneal process after forming the patterned stress-inducing layer over the substantially planar surface, so as to induce a movement of the defects towards a contact interface between the active device area and the isolation structure, wherein the stress field in the active device area has a sign and a magnitude that are conducive to movement of the defects in the active device area towards the contact interface during the anneal process; and removing the patterned stress-inducing layer from the substantially planar surface.
地址 Leuven BE