发明名称 Semiconductor memory apparatus, data transmission device, and recording method
摘要 According to one embodiment, a semiconductor memory apparatus includes a memory and a speed control unit. The speed control unit calculates a time-varying behavior of a permissible value of an accumulated amount of data written in the non-volatile semiconductor memory, where, after a start of a guaranteed period, data is written in the memory at a constant write speed so that the permissible value at an end time of the guaranteed period is equal to a sum of a first capacity and a second capacity. The first capacity is an accumulated amount of data written in the memory. The second capacity is an accumulated amount of data which is writable in the memory in a remaining time of the guaranteed period based on remaining rewritable times of existing blocks. The speed control unit controls a transmission speed of data from a host based on the permissible value.
申请公布号 US9064579(B2) 申请公布日期 2015.06.23
申请号 US201213722361 申请日期 2012.12.20
申请人 Kabushiki Kaisha Toshiba 发明人 Ohshima Gen
分类号 G06F11/00;G11C16/06;G06F13/16;G11C16/10;G11C16/34 主分类号 G06F11/00
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A semiconductor memory apparatus comprising: a non-volatile semiconductor memory which includes a plurality of blocks having an upper limit in the number of rewrite times; a time measurement unit which measures a total operation time counted from a start time of a guaranteed period; a first capacity measurement unit which measures a first capacity which is an actual value of an accumulated amount of data written in the non-volatile semiconductor memory; a second capacity calculation unit which calculates a second capacity which is an accumulated amount of data which is writable in the non-volatile semiconductor memory in a remaining time interval of the guaranteed period based on the number of remaining rewritable times of existing blocks among the plurality of the blocks; and a speed control unit which calculates a time-varying behavior of a permissible value of the accumulated amount of data written in the non-volatile semiconductor memory, where, after the start of the guaranteed period, data is written in the non-volatile semiconductor memory at a constant write speed so that the permissible value at an end time of the guaranteed period is equal to a sum of the first capacity and the second capacity, and which controls a transmission speed of transmission data from outside so that the first capacity does not exceed the permissible value at the timing of measuring the first capacity.
地址 Tokyo JP