发明名称 Optimization of variable resistance memory cells
摘要 A data storage device may generally be constructed and operated with at least one variable resistance memory cell configured with non-factory operational parameters by a controller. The non-factory operational parameters are assigned in response to an identified variance from a predetermined threshold in at least one variable resistance memory cell.
申请公布号 US9064563(B2) 申请公布日期 2015.06.23
申请号 US201313762913 申请日期 2013.02.08
申请人 Seagate Technology LLC 发明人 Khoueir Antoine;Gaertner Mark Allen;Goss Ryan James
分类号 G11C11/00;G11C13/00 主分类号 G11C11/00
代理机构 Hall Estill Attorneys at Law 代理人 Hall Estill Attorneys at Law
主权项 1. An apparatus comprising at least one non-defective variable resistance memory cell connected to an optimization circuit and a controller, the optimization circuit configured to set the at least one variable resistance memory cell with non-factory operational parameters as directed by the controller, the non-factory operational parameters being outside factory provided specifications and assigned in response to a non-defective predicted variance from a predetermined threshold in at least one variable non-defective resistance memory cell.
地址 Cupertino CA US