发明名称 Method and apparatus for forming a CMOS device
摘要 A method and apparatus for forming a CMOS device are provided. The CMOS device may include an N-type channel region formed of an III-V material and a P-type channel region formed of a germanium material. Over each channel may be formed corresponding gates and source/drain regions. The source/drain regions may be formed of a germanium material and one or more metallization layers. An anneal may be performed to form ohmic contacts for the source/drain regions. Openings may be formed in a dielectric layer covering the device and conductive plugs may be formed to provide contact to the source/drain regions.
申请公布号 US9064959(B2) 申请公布日期 2015.06.23
申请号 US201313894902 申请日期 2013.05.15
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Wang Li-Ting;Tsai Teng-Chun;Lin Chun-Hsiung;Lin Cheng-Tung;Chen Chi-Yuan;Lin Kuo-Yin;Pan Wan-Chun;Yen Ming-Liang;Chang Huicheng
分类号 H01L29/786;H01L29/78;H01L29/66 主分类号 H01L29/786
代理机构 Slater & Matsil, L.L.P 代理人 Slater & Matsil, L.L.P
主权项 1. A device comprising: a III-V channel region formed over a silicon substrate; a germanium channel region formed over the silicon substrate, the III-V channel region and the germanium channel region separated by an isolation region; a first gate structure formed over the III-V channel region; a first pair of contacts over the III-V channel region, the first pair of contacts comprising a germanium material; a second gate structure formed over the germanium channel region; a second pair of contacts formed over the germanium channel region, the second pair of contacts comprising a germanium material; and a dielectric layer overlying first and the second gate, wherein the first pair of contacts and the second pair of contacts extend through corresponding openings in the dielectric layer to a top surface of the dielectric layer.
地址 Hsin-Chu TW