发明名称 Semiconductor device having aligned side surfaces
摘要 An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode. A portion of a side surface of the semiconductor layer having the channel formation region and a portion of a side surface of the source electrode or the drain electrode are substantially aligned with each other when seen from a planar direction.
申请公布号 US9064884(B2) 申请公布日期 2015.06.23
申请号 US201113117592 申请日期 2011.05.27
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Kato Kiyoshi
分类号 H01L21/336;H01L49/02;G11C16/04;H01L27/06;H01L27/115;H01L27/12 主分类号 H01L21/336
代理机构 Robinson Intellectual Property Law Office, P.C. 代理人 Robinson Eric J.;Robinson Intellectual Property Law Office, P.C.
主权项 1. A semiconductor device comprising: a first transistor comprising: a first channel formation region;a first gate insulating layer over the first channel formation region;a first gate electrode over the first gate insulating layer, the first gate electrode overlapping with the first channel formation region; anda source region and a drain region between which the first channel formation region is sandwiched; and a second transistor comprising: a semiconductor layer comprising a second channel formation region;a source electrode and a drain electrode over the semiconductor layer and electrically connected to the second channel formation region, the source electrode and the drain electrode overlapping with a top surface of the semiconductor layer;a second gate electrode overlapping with the second channel formation region; anda second gate insulating layer between the second channel formation region and the second gate electrode, wherein the first channel formation region and the second channel formation region comprise different semiconductor materials as respective main components, wherein a side surface of the first channel formation region, a side surface of the first gate insulating layer, and a side surface of the first gate electrode are substantially aligned with each other, wherein a side surface of the semiconductor layer and a side surface of the source electrode or the drain electrode are substantially aligned with each other, wherein the side surface of the first channel formation region is parallel with a channel length direction of the first transistor, wherein the side surface of the semiconductor layer is parallel with a channel length direction of the second transistor, wherein the second channel formation region comprises an oxide semiconductor and wherein a density of carriers in the oxide semiconductor is less than 1×1012/cm3.
地址 Atsugi-shi, Kanagawa-ken JP