Performing variation-aware profiling and dynamic core allocation for a many-core processor

摘要

In one embodiment, the present invention includes a processor with multiple cores each having a self-test circuit to determine a frequency profile and a leakage power profile of the corresponding core. In turn, a scheduler is coupled to receive the frequency profiles and the leakage power profiles and to schedule an application on at least some of the cores based on the frequency profiles and the leakage power profiles. Other embodiments are described and claimed.

主权项

1. A processor comprising:
a plurality of cores each having a self-test circuit to determine a frequency profile and a leakage power profile of the corresponding core; and a scheduler to:
receive the frequency profiles and the leakage power profiles of the plurality of cores,based at least in part on a dynamic switching capacitance of a compute block, the frequency profile of each core of the plurality of cores, the leakage power profile of each core of the plurality of cores, and a performance requirement of the application, determine a voltage and a frequency of each core of at least some of the plurality of cores,based at least in part on the dynamic switching capacitance of the compute block, the frequency profile of each core of the plurality of cores, the leakage power profile of each core of the plurality of cores, and the performance requirement of the application, schedule an application on the at least some of the plurality of cores, wherein the scheduler is to schedule the application at a minimum energy point that meets the performance requirement of the application, andadjust the voltage and the frequency of each core of the at least some of the plurality of cores independently.