发明名称 Methods of forming gate structures by a gate-cut-last process and the resulting structures
摘要 One method disclosed includes, among other things, forming an uncut line-type gate structure above first and second spaced-apart active regions of a semiconductor substrate, forming a sidewall spacer around a perimeter of the line-type gate structure, performing at least one etching process to remove an axial portion of a gate cap layer and an axial portion of a gate electrode that are positioned above the isolation region so as to thereby define first and second cut end surfaces of first and second gate electrodes, respectively, and an isolation plug cavity and forming a gate cut isolation plug in the isolation plug cavity.
申请公布号 US9064932(B1) 申请公布日期 2015.06.23
申请号 US201414268478 申请日期 2014.05.02
申请人 GLOBALFOUNDRIES Inc. 发明人 Pham Daniel T.;Hu Zhenyu
分类号 H01L21/70;H01L21/768;H01L21/8234;H01L29/423;H01L27/092 主分类号 H01L21/70
代理机构 Amerson Law Firm, PLLC 代理人 Amerson Law Firm, PLLC
主权项 1. A method, comprising: forming an uncut line-type gate structure above first and second spaced-apart active regions of a semiconductor substrate and above an isolation region formed in said substrate that is positioned between said first and second spaced-apart active regions, wherein said uncut line-type gate structure comprises a gate electrode structure and a gate cap layer positioned above said gate electrode structure and wherein said line-type gate structure has been patterned so as to have a desired critical dimension of a transistor device; forming a sidewall spacer around a perimeter of said line-type gate structure; after forming said sidewall spacer, performing at least one etching process to remove an axial portion of said gate cap layer and an axial portion of said gate electrode that are positioned above said isolation region so as to thereby define first and second cut ends of first and second gate electrodes, respectively, and an isolation plug cavity positioned between said sidewall spacer and said first and second cut ends of said first and second gate electrodes; and forming a gate cut isolation plug in said isolation plug cavity.
地址 Grand Cayman KY