3D integrated circuit structure, semiconductor device and method of manufacturing same

摘要

The present invention discloses a semiconductor device. In one embodiment, the semiconductor device comprises a substrate, a diffusion stop layer formed on the substrate, an SOI layer formed on the diffusion stop layer, an MOSFET transistor formed on the SOI layer, and a TSV formed in a manner of penetrating through the substrate, the diffusion stop layer, the SOI layer, and a layer where the MOSFET transistor is located; and an interconnect structure connecting the MOSFET transistor and the TSV.

主权项

1. A three-dimension integrated circuit structure, characterized in that the integrated circuit structure comprises:
a first wafer, comprising:
a substrate defining a contact surface of the first wafer;a layer having a metal oxide semiconductor field effect transistor (MOSFET) formed therein;a diffusion stop layer disposed between the substrate and the layer having the MOSFET transistor;a silicon-on-insulator (SOI) layer formed on the diffusion stop layer;a through-silicon-via (TSV) formed in a manner of penetrating through the substrate, the diffusion stop layer, the SOI layer and at least partially penetrating through the layer having the MOSFET transistor; anda first interconnect structure for connecting the MOSFET transistor and the TSV; wherein a metal material filled in the TSV is exposed at the contact surface of the first wafer, the TSV further comprises a buried layer positioned between the surface of the TSV and the metal material, and the contact surface of the first wafer is connected to external circuits or a second interconnect structure of a second wafer by means of the TSV.