| 摘要 |
PROBLEM TO BE SOLVED: To reduce noise in a clock signal.SOLUTION: According to the prevent invention, a phase difference comparison circuit compares the phase of each of inputted input clock signal and feedback signal and supplies a phase difference signal indicating a phase difference between the input clock signal and the feedback signal. A filter circuit suppresses a high-frequency component of the phase difference signal the frequency of which component is higher than a prescribed cutoff frequency. An output circuit performs modulation, on the phase difference signal the high-frequency component of which was suppressed, for reducing a low-frequency band noise component and increasing a high-frequency band noise component, generates an output clock signal from the modulated phase difference signal and a reference clock signal, and outputs the generated signal. A frequency-dividing circuit divides the frequency of the outputted output clock signal at a prescribed division rate and has the frequency-divided signal fed back by a phase comparison circuit as the feedback signal. |
