| 摘要 |
The present invention relates to a pipeline ADC using a SAR ADC-based MDAC. In particular, a residual voltage amplifier of a MDAC is replaced with a preamp in a comparator of a SAR ADC converter and a residual voltage gain error generated at this time is compensated in a digital domain, thereby proposing a pipeline ADC which is compensated for a residual voltage gain error by using a linear approximation. The pipeline ADC of the present invention increases a residual voltage by using a preamp (PA) which is used (already provided with a comparator) in a comparator of a SAR ADC without using a separate amplifier and thereby has an advantage of reducing power consumption and an area of a chip. In addition, a distortion of the amplified residual voltage, which is caused by non-linear features of the gain of the preamp, is corrected in a digital domain, and a reference voltage is divided in carrying out a linear approximation attendant to the correction so as to increase an accuracy of the correction. Ultimately, the present invention has an advantage of securing a capacity of the pipeline ADC. |
