| 发明名称 |
PACKAGE ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME |
| 摘要 |
A package assembly and a method for manufacturing the same are disclosed. The package assembly includes a chip carrier having interconnect areas, solder disposed in the interconnect areas, and an electronic device having conductive bumps each of which has an end in contact with the solder. Thus, the electronic device is soldered to the chip carrier. The interconnect areas each have a recess for contacting and receiving the solder and securing respective one of the conductive bumps. When the solder flows during operation, the package assembly according to the present disclosure maintains a good electrical connection between the chip carrier and the electronic device, which results in a high reliability and a long lifetime. |
| 申请公布号 |
US2015171064(A1) |
申请公布日期 |
2015.06.18 |
| 申请号 |
US201414567342 |
申请日期 |
2014.12.11 |
| 申请人 |
Silergy Semiconductor Technology (Hangzhou) Ltd. |
发明人 |
Tan Xiaochun |
| 分类号 |
H01L25/16;H01L23/00;H01L21/56;H01L21/48;H01L23/528;H01L23/31;H01L21/768;H01L23/495;H01L25/00 |
主分类号 |
H01L25/16 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A package assembly comprising:
a chip carrier having interconnect areas; solder disposed in said interconnect areas; and an electronic device having conductive bumps each of which has an end in contact with said solder so that said electronic device is soldered to said chip carrier, wherein said interconnect areas each have a recess for contacting and receiving said solder and securing respective one of said conductive bumps. |
| 地址 |
Hangzhou CN |
