ELONGATED CONTACTS USING LITHO-FREEZE-LITHO-ETCH PROCESS

摘要

A process of forming an integrated circuit containing elongated contacts which connect to three active areas and/or MOS gates, and elongated contacts which connect to two active areas and/or MOS gates and directly connect to a first level interconnect, using a litho-freeze-litho-etch process for a contact etch mask. A process of forming an integrated circuit containing elongated contacts which connect to three active areas and/or MOS gates, and elongated contacts which connect to two active areas and/or MOS gates and directly connect to a first level interconnect, using a litho-freeze-litho-etch process for a first level interconnect trench etch mask. A process of forming the integrated circuit using a litho-freeze-litho-etch process for a contact etch mask and a litho-freeze-litho-etch process for a first level interconnect trench etch mask.

主权项

1. A method of forming an integrated circuit, comprising the steps:
forming elements of field oxide at a top surface of a substrate, so that regions of the substrate between the field oxide are active areas; forming metal oxide semiconductor (MOS) transistor gates over the substrate; forming a pre-metal dielectric (PMD) layer over the active areas and the MOS transistor gates, the PMD layer having contact areas defined for contacts; forming a contact etch mask over the PMD layer, by a process including the steps:
forming a first contact photoresist layer over the PMD layer;performing a first contact exposure operation on the first contact photoresist layer with a first contact subpattern;developing the first contact photoresist layer;performing a freeze process on the first contact photoresist layer to form a first contact etch submask of the contact etch mask;forming a second contact photoresist layer over the PMD layer;performing a second contact exposure operation on the second contact photoresist layer with a second contact subpattern;developing the second contact photoresist layer to form a second contact etch submask of the contact etch mask, so that boundaries of the contact areas are formed by combined edges of the first contact etch submask and the second contact etch submask; etching a plurality of contact holes in the PMD layer in areas defined by the contact areas; filling the contact holes with contact metal to form a plurality of contacts, the plurality of contact including:
dual node elongated contacts which connect to exactly two active areas and/or MOS gates; andmultiple node elongated contacts which connect to three or more active areas and/or MOS gates; forming an intra-metal dielectric (IMD) layer above the PMD layer, the IMD layer having interconnect areas defined for interconnects; etching a plurality of interconnect trenches in the IMD layer in areas defined by the interconnect areas; filling the interconnect trenches with interconnect metal to form a plurality of first level interconnects, so that each of the dual node elongated contacts is directly connected to at least one of the first level interconnects.