发明名称 DESIGN-BASED WEIGHTING FOR LOGIC BUILT-IN SELF-TEST
摘要 Embodiments relate to design-based weighting for logic built-in self-test (LBIST). An aspect includes a computer program product for implementing design-based weighting for LBIST. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes analyzing, by the processing circuit, a plurality of integrated circuit design organizational units to determine preferred weightings of the integrated circuit design organizational units that provide a highest level of failure coverage when applied to a random pattern generator. Based on determining the preferred weightings, the processing circuit creates an integrated circuit layout that includes a plurality of weighted test paths to respectively apply the preferred weightings to the integrated circuit design organizational units. The integrated circuit layout is incorporated in a device under test.
申请公布号 US2015168489(A1) 申请公布日期 2015.06.18
申请号 US201414501122 申请日期 2014.09.30
申请人 International Business Machines Corporation 发明人 Cook Gregory J.;Koprowski Timothy J.;Kusko Mary P.;Lichtenau Cedric
分类号 G01R31/317;G01R31/3177 主分类号 G01R31/317
代理机构 代理人
主权项 1. A computer program product for implementing design-based weighting for logic built-in self-test (LBIST), the computer program product comprising: a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: analyzing, by the processing circuit, a plurality of integrated circuit design organizational units to determine preferred weightings of the integrated circuit design organizational units that provide a highest level of failure coverage when applied to a random pattern generator; based on determining the preferred weightings, creating, by the processing circuit, an integrated circuit layout comprising a plurality of weighted test paths to respectively apply the preferred weightings to the integrated circuit design organizational units; and incorporating the integrated circuit layout in a device under test.
地址 Armonk NY US