发明名称 BIT LINE AND COMPARE VOLTAGE MODULATION FOR SENSING NONVOLATILE STORAGE ELEMENTS
摘要 <p>In a block of non-volatile memory, bit line current increases with bit line voltage. For current sensing memory systems, average bit line current during a sensing operation need only exceed a certain threshold amount in order to produce a correct result. For the first word lines being programmed in a block, memory cells connected thereto see relatively low bit line resistances during verify operations. In the disclosed technology, verify operations are performed for these first programmed word lines with lower verify bit line voltages in order to reduce excess bit line current and save power. During read operations, this scheme can make threshold voltages of memory cells connected to the lower word lines appear lower. In order to compensate for this effect, various schemes are disclosed.</p>
申请公布号 WO2015053919(A4) 申请公布日期 2015.06.18
申请号 WO2014US56403 申请日期 2014.09.18
申请人 SANDISK TECHNOLOGIES INC. 发明人 DUNGA, MOHAN V.;HIGASHITANI, MASAAKI
分类号 G11C16/34;G11C5/14;G11C7/12;G11C11/56;G11C16/24;G11C16/26 主分类号 G11C16/34
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