发明名称 CIRCUITS AND METHODS FOR IMPROVED QUALITY FACTOR IN A STACK OF TRANSISTORS
摘要 Circuits and method for improved quality factor in a stack of transistors. A switching device can include a plurality of field-effect transistors (FETs) implemented in a stack configuration. The switching device can further include a bias circuit having a distribution network that couples a bias input node to the gate of each FET. The distribution network can include a plurality of first nodes, with each first node connected to one or more of the gates through one or more respective resistive paths. The distribution network can further include one or more second nodes, with each second node connected to one or more of the first nodes through one or more respective resistive paths. At least some of the resistive paths can have resistance values selected to reduce loss of a radio-frequency (RF) signal when the FETs are in an OFF state.
申请公布号 US2015171860(A1) 申请公布日期 2015.06.18
申请号 US201414536814 申请日期 2014.11.10
申请人 SKYWORKS SOLUTIONS, INC. 发明人 BLIN Guillaume Alexandre
分类号 H03K17/687;H01L21/8234 主分类号 H03K17/687
代理机构 代理人
主权项 1. A switching device comprising: a first terminal and a second terminal; a plurality of field-effect transistors (FETs) implemented in a stack configuration between the first terminal and the second terminal, each FET having a source, a drain and a gate, the FETs configured to be in an ON state or an OFF state to respectively allow or inhibit passage of a radio-frequency (RF) signal between the first and second terminals; and a bias circuit having a bias input node and a distribution network that couples the bias input node to the gate of each FET, the distribution network including a plurality of first nodes, each first node connected to one or more of the gates through one or more respective resistive paths, the distribution network further including one or more second nodes, each second node connected to one or more of the first nodes through one or more respective resistive paths, at least some of the resistive paths associated with the first nodes and the second nodes having resistance values selected to reduce loss of the RF signal when the FETs are in the OFF state.
地址 Woburn MA US