发明名称 SYSTEM AND METHOD FOR CYCLE SLIP CORRECTION
摘要 <p>A system and method including a parity bit encoder (202) for encoding bits of data to be transmitted with first and second parity check bits to produce successive block of bits. Each of the blocks of bits are Gray mapped to a plurality of associated QAM symbols that are modulated onto an optical wavelength and transmitted to a receiver. A de-mapper (304) corrects for 90 degree and 180 degree cycle slip using parity indicated by the first and second parity bits.</p>
申请公布号 WO2015088872(A1) 申请公布日期 2015.06.18
申请号 WO2014US68540 申请日期 2014.12.04
申请人 TYCO ELECTRONICS SUBSEA COMMUNICATIONS LLC 发明人 ZHANG, HONGBIN;BATSHON, HUSSAM G.
分类号 H04L1/00 主分类号 H04L1/00
代理机构 代理人
主权项
地址