发明名称 |
FLASH DEVICES AND METHODS OF MANUFACTURING THE SAME |
摘要 |
Flash devices and methods of manufacturing the same are provided. The device may include: a semiconductor substrate, with a well region therein; a sandwich arrangement on the well region, including a back gate conductor, semiconductor fins on opposite sides of the back gate conductor, and back gate dielectric layers separating the back gate conductor from the respective semiconductor fins, wherein the well region serves as a part of a conductive path to the back gate conductor; a front gate stack intersecting the semiconductor fins, including a floating gate dielectric layer, a floating gate conductor, a control gate dielectric layer, and a control gate conductor stacked sequentially, wherein the floating gate dielectric layer separates the floating gate conductor from the semiconductor fins; an insulating cap on top of the back gate conductor and the semiconductor fins to separate the back gate conductor from the front gate stack; and source and drain regions connected to a channel region provided by each of the semiconductor fins. The device can achieve high integration and low power consumption. |
申请公布号 |
US2015171096(A1) |
申请公布日期 |
2015.06.18 |
申请号 |
US201314403042 |
申请日期 |
2013.04.26 |
申请人 |
INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES |
发明人 |
Zhu Huilong |
分类号 |
H01L27/115;H01L29/788;H01L29/66;H01L21/266;H01L29/49;H01L21/28;H01L21/033;H01L21/02;H01L29/78;H01L29/10 |
主分类号 |
H01L27/115 |
代理机构 |
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代理人 |
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主权项 |
1. A flash device, comprising:
a semiconductor substrate; a well region formed in the semiconductor substrate; a sandwich arrangement on the well region, including a back gate conductor, semiconductor fins on opposite sides of the back gate conductor, and gate dielectric layers separating the back gate conductor from the respective semiconductor fins, wherein the well region serves as a part of a conductive path to the back gate conductor; a front gate stack intersecting the semiconductor fins, including a floating gate dielectric layer, a floating gate conductor, a control gate dielectric layer, and a control gate conductor stacked sequentially, wherein the floating gate dielectric layer separates the floating gate conductor from the semiconductor fins; an insulating cap on top of the back gate conductor and the semiconductor fins to separate the back gate conductor from the front gate stack; and source and drain regions connected to a channel region provided by each of the semiconductor fins. |
地址 |
Beijing CN |