| 摘要 |
The purpose of the present invention is to employ surrounding gate transistors (SGT), a type of vertical transistor, to provide a semiconductor device of small surface area constituting a column select gate decoder. In a column select gate decoder constituted by PMOS transistors or NMOS transistors selectively connecting a plurality of bit lines and a common data line, the MOS transistors are formed on a planar silicon layer formed on a substrate, the drain, gate, and source are arranged in the vertical direction, the gate has a structure which surrounds a silicon pillar, and the planar silicon layer comprises a first activated region having a first type of conduction and a second activated region having a second type of conduction, the regions being connected to one another through a silicon layer formed on the planar silicon layer surface, thereby providing a semiconductor device of small surface area. |
