MULTIPLE DEPTH VIAS IN AN INTEGRATED CIRCUIT

摘要

An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.

主权项

1. An integrated circuit, comprising:
a first level of interconnect; an first etch stop layer with a first thickness on said first level of interconnect; a first ILD layer on said first etch stop layer; a device formed on said first ILD layer; a second etch stop layer with a second thickness approximately equal to said first thickness plus an additional thickness approximately equal to the depth of a deep via minus the depth of a shallow via times the ratio of an etch rate of said etch stop layer to an etch rate of said ILD in a plasma ILD via etch; a second ILD layer formed over said device; a second level of interconnect formed on said second ILD layer; a deep via through said first etch stop layer and through said first ILD layer and through said second ILD layer connecting said second level of interconnect to said first level of interconnect; and a shallow via through said second etch stop layer and through said second ILD layer connecting said second level of interconnect to said device.