WAFER-LEVEL PACKAGING FOR SOLID-STATE TRANSDUCERS AND ASSOCIATED SYSTEMS AND METHODS

摘要

Wafer-level packaging of solid-state transducers (“SSTs”) is disclosed herein. A method in accordance with a particular embodiment includes forming a transducer structure having a first surface and a second surface opposite the first surface, and forming a plurality of separators that extend from at least the first surface of the transducer structure to beyond the second surface. The separators can demarcate lateral dimensions of individual SSTs. The method can further include forming a support substrate on the first surface of the transducer structure, and forming a plurality of discrete optical elements on the second surface of the transducer structure. The separators can form barriers between the discrete optical elements. The method can still further include dicing the SSTs along the separators. Associated SST devices and systems are also disclosed herein.

主权项

1. A solid-state transducer (SST) assembly comprising:
a plurality of SSTs, wherein individual SSTs include a support substrate, first contacts, a transducer structure, and second contacts stacked sequentially, and wherein the transducer structure has a first surface proximate to the support substrate and a second surface opposite the first surface; a plurality of separators demarcating the individual SSTs, wherein the separators project from the first surface of the transducer structure beyond the second surface; and a plurality of discrete optical elements over the second surface of the transducer structure, wherein the separators form barriers between the discrete optical elements.