发明名称 INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD
摘要 In a MOSFET, the lead parts of gate lead wiring that lead out a gate electrode on the periphery of a substrate constitute a non-operative region where it is impossible to dispose a MOSFET transistor cell (C) that will function as efficiently as inside an element region. If the gate lead wiring is disposed along the four edges of a chip, for example, the area of the non-operative region increases, limiting the extent to which the surface area of the element region can be enlarged and the chip surface area reduced. In the present invention, gate lead wiring and a conductor, which is connected to the gate lead wiring and a protection diode, are disposed in a non-curved, linear configuration along one edge of a chip. In addition, a first gate electrode layer that extends superimposed on the gate lead wiring and the conductor, and connects the gate lead wiring and the conductor to the protection diode, has no more than one curved part. Furthermore, the protection diode is disposed adjacent to the conductor or the gate lead wiring, and a portion of the protection diode is disposed near a gate pad.
申请公布号 US2015171071(A1) 申请公布日期 2015.06.18
申请号 US201514618571 申请日期 2015.02.10
申请人 SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC 发明人 Yagi Haruyoshi;Yajima Manabu
分类号 H01L27/02;H01L49/02;H01L21/8234 主分类号 H01L27/02
代理机构 代理人
主权项
地址 Phoenix AZ US