发明名称 DOPANT ETCH SELECTIVITY CONTROL
摘要 Methods of etching two doped silicon portions at two different etch rates are described. An n-type silicon portion may be etched faster than a p-type silicon portion when both are exposed and present on the same substrate. The n-type silicon portion may be doped with phosphorus and the p-type silicon portion may be doped with boron. In one example, the n-type silicon portion is single crystal silicon and the p-type silicon portion is polycrystalline silicon (a.k.a. polysilicon). The p-type silicon portion may be a polysilicon floating gate in a flash memory cell and may be located above a gate silicon oxide which, in turn, is above an n-type active area single crystal silicon portion. The additional trimming of the n-type active area silicon portion may reduce the accumulation of trapped charges during use and increase the lifespan of flash memory devices.
申请公布号 US2015170920(A1) 申请公布日期 2015.06.18
申请号 US201414230590 申请日期 2014.03.31
申请人 Applied Materials, Inc. 发明人 Purayath Vinod R.;Wang Anchuan;Ingle Nitin K.
分类号 H01L21/28;H01L21/3213;H01L21/3065 主分类号 H01L21/28
代理机构 代理人
主权项 1. A method of etching a substrate, the method comprising: transferring the substrate into a substrate processing region of a substrate processing chamber; flowing a fluorine-containing precursor into a remote plasma region fluidly coupled to the substrate processing region while forming a plasma in the remote plasma region to produce plasma effluents; flowing the plasma effluents into the substrate processing region housing the substrate, wherein the plasma effluents flow into the substrate processing region through perforations in an ion suppression element disposed between the remote plasma region and the substrate processing region; and etching an n-type silicon portion faster than a p-type silicon portion by flowing the plasma effluents into the substrate processing region, wherein the substrate comprises the n-type silicon portion and the p-type silicon portion.
地址 Santa Clara CA US