发明名称 |
SYSTEM AND METHOD FOR LATENCY BASED DATA RECYCLING IN SOLID STATE MEMORY SYSTEM |
摘要 |
PROBLEM TO BE SOLVED: To provide a system for recycling data in a solid state memory.SOLUTION: A solid-state storage device 100 includes: an iterative count based data recycle control circuit 180; a host controller circuit 160 that directs read and write access to flash memory cells 140; and an iterative data processing circuit 170. The iterative data processing circuit 170 increments an iteration count when each iteration of a data decoding algorithm is applied. The iterative count based data recycle control circuit 180 determines whether to recycle read data 175 on the basis of the iteration count. |
申请公布号 |
JP2015111388(A) |
申请公布日期 |
2015.06.18 |
申请号 |
JP20140148529 |
申请日期 |
2014.07.22 |
申请人 |
LSI CORP |
发明人 |
CAI YU;WU YUNXIANG;CHEN NING;ERICH HARATSCH;CHEN ZHENGANG |
分类号 |
G06F12/16 |
主分类号 |
G06F12/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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