摘要 |
<p>A transistor device comprising: source 6b,8b and drain 6a,8a conductors connected by a semiconductor channel 18 provided by a layer of semiconductor material formed over the source 6b,8b and drain 6a,8a conductors; and gate conductor 14 capacitively coupled to the semiconductor channel 18 via a gate dielectric 12; wherein least one of the source 6b,8b and drain 6a,8a conductors comprises a rnultilayer structure in at least one region thereof, the multilayer structure comprising a lower layer 6a,6b and an upper layer 8a,8b, the material of the lower layer 6a,6b being better than the material of the upper layer 8a,8b at injecting charge into the semiconductor material; and the material of the upper layer 8a,8b exhibiting better electrical conductivity than the material of the lower layer 6a,6. Wherein, at least an edge portion of the upper surface of the lower layer 6a,6b is selectively uncovered by the upper layer 8a,8b in at least a region where the source and drain conductors are in closest proximity to each other via the semiconductor. Also disclosed is a method of forming the above transistor device.</p> |