发明名称 半導体記憶装置
摘要 <p>A semiconductor integrated circuit device, includes a first and a second bus line making a bus line pair, and a plurality of circuit units, each of the circuit units including, a first transistor, a second transistor, and a third and a fourth transistor sharing a source or a drain. The circuit units includes a first and a second circuit unit arranged in a first direction. One of a source and a drain of the first transistor of the first circuit unit and one of a source and a drain of the second transistor of the first circuit unit are coupled to the first bus line. The source or the drain shared by the third and the fourth transistor of the first circuit unit is coupled to the second bus line.</p>
申请公布号 JP5736224(B2) 申请公布日期 2015.06.17
申请号 JP20110087971 申请日期 2011.04.12
申请人 发明人
分类号 H01L21/8242;G11C11/401;H01L27/108 主分类号 H01L21/8242
代理机构 代理人
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