| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To estimate a place prone to EOE in a circuit layout device. <P>SOLUTION: A circuit layout device 1 includes: a circuit information acquisition section 11 for acquiring circuit information including a wiring pattern of a circuit to be polished; a mesh information generation section 12 for dividing the circuit into arbitrary unit areas of a meshed pattern and generating mesh information indicating a wiring density in a mesh area and a wiring density in each peripheral area adjoining to each side of the mesh area, for each mesh area; and an error extraction section 13 for extracting a mesh area in which relation of densities between the mesh area and each peripheral area meets conditions for EOE occurrence and generating error information on the mesh area, for each mesh area. <P>COPYRIGHT: (C)2013,JPO&INPIT</p> |
