发明名称 Hypervisor isolation of processor cores to enable computing accelerator cores
摘要 Techniques for utilizing processor cores include sequestering processor cores for use independently from an operating system. In at least one embodiment of the invention, a method includes executing an operating system on a first subset of cores including one or more cores of a plurality of cores of a computer system. The operating system executes as a guest under control of a virtual machine monitor. The method includes executing work for an application on a second subset of cores including one or more cores of the plurality of cores. The first and second subsets of cores are mutually exclusive and the second subset of cores is not visible to the operating system. In at least one embodiment, the method includes sequestering the second subset of cores from the operating system.
申请公布号 US9058183(B2) 申请公布日期 2015.06.16
申请号 US200912648592 申请日期 2009.12.29
申请人 Advanced Micro Devices, Inc. 发明人 Woller Thomas R.;Kaminski Patryk;Boleyn Erich;Lowery Keith A.;Serebrin Benjamin C.
分类号 G06F9/44;G06F9/455;G06F9/50 主分类号 G06F9/44
代理机构 Abel Law Group, LLP 代理人 Abel Law Group, LLP
主权项 1. A method comprising: executing a virtual machine monitor on a computer system including a plurality of cores; selecting one or more cores of the plurality of cores as a first subset of cores; executing an operating system on the first subset of cores, wherein the operating system executes as a guest under control of the virtual machine monitor and an application executes using the operating system; sequestering from the operating system, as one or more computing accelerators, a second subset of cores of the plurality of cores, the first and second subsets of cores being mutually exclusive, wherein the virtual machine monitor provides an interface to the first subset of cores and the second subset of cores; scheduling work for the application to be completed by the second subset of cores; causing a core of the second subset of cores to exit to the virtual machine monitor in response to an inter-processor interrupt caused by a core of the first subset of cores; and executing the work for the application on the second subset of cores, the second subset of cores not being visible to the operating system, and the application indirectly accessing the second subset of cores using the virtual machine monitor.
地址 Sunnyvale CA US