发明名称 Method for generating mask data and method for manufacturing integrated circuit device
摘要 According to one embodiment, a method for generating mask data is configured to form a circuit pattern on a substrate using a directed self-assembly material. The method includes extracting a first region, setting a second region and setting a third region. The first region does not existing in the circuit pattern and existing in an initial pattern. The initial pattern includes a plurality of interconnect patterns extending in a first direction. The second region is formed by elongating the first region in a second direction intersecting the first direction. The second region straddles the first region in the second direction. The third region includes at least one of the second regions. The directed self-assembly material is disposed in the third region.
申请公布号 US9058996(B2) 申请公布日期 2015.06.16
申请号 US201313771928 申请日期 2013.02.20
申请人 Kabushiki Kaisha Toshiba 发明人 Maeda Shimon;Ito Shinichi
分类号 G06F17/50;H01L21/027;G03F1/36;G03F1/00 主分类号 G06F17/50
代理机构 Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P. 代理人 Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
主权项 1. A method for generating a mask configured to form a circuit pattern on a substrate using a directed self-assembly material, comprising: extracting a first region not existing in the circuit pattern and existing in an initial pattern, the initial pattern including a plurality of interconnect patterns extending in a first direction; setting at least one second region formed by elongating the first region in a second direction intersecting the first direction to straddle the first region in the second direction; setting a third region to include at least one of the second regions, the directed self-assembly material being disposed in the third region; generating mask data to include the third region; and making a mask based on the mask data.
地址 Tokyo JP