Semiconductor devices having transistors along different orientations

摘要

Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes an array having at least one first region and at least one second region. The at least one first region includes at least one first device oriented in a first direction. The at least one second region includes at least one second device oriented in a second direction. The second direction is different than the first direction.

主权项

1. A semiconductor device, comprising:
an array, the array comprising at least one first region and at least one second region, the at least one first region comprising at least one first device having a current flow direction oriented in a first direction, the at least one second region comprising at least one second device having a current flow direction oriented in a second direction, the second direction being different than the first direction, wherein each of the at least one first device and the at least one second device comprises a transistor comprising: a first well having a first doping type, a second well having a second doping type opposite the first well and disposed laterally adjacent the first well, the first well and the second well sharing a first p-n junction, a third well having the first doping type disposed underneath the second well, the third well overlapping with the second well and forming a second p-n junction with the second well, a first shallow trench isolation region disposed in the first well, a second shallow trench isolation region disposed in the second well, a body contact disposed in the first well, a source contact disposed in the first well and isolated from the body contact by the first shallow trench isolation region, a drain contact disposed in the second well, the second shallow trench isolation region disposed between the first p-n junction and the drain contact, a first gate disposed over the first well, a second gate disposed over the first and second wells, and overlapping with the first well, the second well, and the second shallow trench isolation region, wherein the first gate and the second gate are physically separated and parallel lines, wherein the first gate of the at least one first device extends along the second direction and the first gate of the at least one second device extends along the first direction, wherein the second direction is substantially perpendicular to the first direction wherein the third well overlaps with an edge portion of the first well near the first p-n junction.