发明名称 System and method for leakage estimation for standard integrated circuit cells with shared polycrystalline silicon-on-oxide definition-edge (PODE)
摘要 A system and method of producing an integrated circuit using abutted cells having shared polycrystalline silicon on an oxide definition region edge (PODE) includes modeling inter-cell leakage current in a plurality of different cells. Each of the plurality of different cells is abutted with another cell and having the shared PODE. The method also comprises verifying a pre-determined acceptable power consumption of the integrated circuit based on the inter-cell leakage current.
申请公布号 US9058462(B2) 申请公布日期 2015.06.16
申请号 US201314015846 申请日期 2013.08.30
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Tam King-Ho;Chang Yeh-Chi;Yang Kuo-Nan;Jiang Zhe-Wei;Wang Chung-Hsing
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Lowe Hauptman & Ham, LLP 代理人 Lowe Hauptman & Ham, LLP
主权项 1. A method of producing an integrated circuit using abutted cells having shared polycrystalline silicon on an oxide definition region edge (PODE), comprising: modeling, by a processor, inter-cell leakage current in a plurality of different cells, each of the plurality of different cells abutted with another cell and having the shared PODE; and verifying a pre-determined acceptable power consumption of the integrated circuit based on the inter-cell leakage current.
地址 TW