发明名称 Resistive random access memory devices having variable resistance layers and related methods
摘要 Resistive memory devices are provided having a gate stack including insulating layers and gates stacked on a substrate in a vertical direction, a channel penetrating the gate stack in the vertical direction to be electrically connected to the substrate, a gate insulating layer provided between the channel and the gates, and a variable resistance layer disposed along an extending direction of the channel. The gate stack may include an alcove formed by recessing the gate in a horizontal direction. The variable resistance layer may extend toward the alcove in the horizontal direction and be overlapped with at least one of the gates in the horizontal direction. Related methods are also provided.
申请公布号 US9059395(B2) 申请公布日期 2015.06.16
申请号 US201314090803 申请日期 2013.11.26
申请人 Samsung Electronics Co., Ltd. 发明人 Ju Hyunsu;Kim Eunmi;Shin Yoocheol;Yang Min Kyu;Choi Jungdal
分类号 H01L29/02;H01L45/00;H01L27/24 主分类号 H01L29/02
代理机构 Myers Bigel Sibley & Sajovec 代理人 Myers Bigel Sibley & Sajovec
主权项 1. A resistive memory device, comprising: a gate stack including mold insulating layers and gates vertically stacked on a substrate; a channel penetrating the gate stack in a vertical direction and electrically connected to the substrate; a gate insulating layer provided between the channel and the gates; and a variable resistance layer on the channel, wherein the variable resistance layer comprises: a vertical layer extending on the channel in the vertical direction; and a protrusion extending toward a sidewall of the gate from the vertical layer in a horizontal direction, the sidewall of the gate facing the channel; wherein the gates in the gate stack define an alcove, the alcove being formed by recessing the gate in the horizontal direction; and wherein the protrusion of variable resistance layer extends towards the alcove in the horizontal direction and overlaps with at least one of the gates in the horizontal direction.
地址 KR