发明名称 Method for manufacturing SOI substrate and method for manufacturing semiconductor device
摘要 A method for manufacturing an SOI substrate with favorable adherence without high-temperature heat treatment being performed in bonding, and a semiconductor device using the SOI substrate and a manufacturing method thereof are proposed. An SOI substrate and a semiconductor device can be manufactured by forming a single-crystalline silicon substrate with a thickness of 50 μm or less in which a brittle layer is formed; forming a supporting substrate having an insulating layer over a surface; activating at least one of the surfaces of the single-crystalline silicon substrate and the insulating layer by exposure to a plasma atmosphere or an ion atmosphere; and bonding the single-crystalline silicon substrate and the supporting substrate with the insulating layer interposed therebetween.
申请公布号 US9059247(B2) 申请公布日期 2015.06.16
申请号 US200812076994 申请日期 2008.03.26
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Yamazaki Shunpei;Ohnuma Hideto
分类号 H01L21/30;H01L21/762;H01L27/12;H01L29/66 主分类号 H01L21/30
代理机构 Robinson Intellectual Property Law Office, P.C. 代理人 Robinson Eric J.;Robinson Intellectual Property Law Office, P.C.
主权项 1. A method for manufacturing an SOI substrate, comprising the steps of: forming a brittle layer in a single-crystalline semiconductor substrate so that a single-crystalline semiconductor layer is provided on the brittle layer; forming a cap layer over the single-crystalline semiconductor layer; bonding the single-crystalline semiconductor layer and a supporting substrate to each other with the cap layer interposed therebetween; and separating the single-crystalline semiconductor layer from the single-crystalline semiconductor substrate at the brittle layer so that the single-crystalline semiconductor layer is formed over the supporting substrate with the cap layer interposed therebetween, wherein a thickness from a top surface to a bottom surface of the single-crystalline semiconductor substrate is 50 μm or less, and wherein the top surface and the bottom surface of the single-crystalline semiconductor substrate are exposed to air.
地址 Atsugi-shi, Kanagawa-ken JP