Resistance-based random access memory

摘要

A resistance-based random access memory circuit includes a first data line, a second data line, a plurality of memory cells, a first driving unit, and a second driving unit. The memory cells are arranged one following another in parallel with the first and second data lines. Each of the memory cells are coupled between the first data line and the second data line. The first driving unit is coupled with first ends of the first and second data lines. The first driving unit is configured to electrically couple one of the first data line and the second data line to a first voltage node. The second driving unit is coupled with second ends of the first and second data lines. The second driving unit is configured to electrically couple the other one of the first data line and the second data line to a second voltage node.

主权项

1. A resistance-based random access memory circuit, comprising:
a first data line having a first end and a second end; a second data line having a first end and a second end; a plurality of resistance-based memory cells arranged one following another along a direction in parallel with the first data line and the second data line, each of the plurality of resistance-based memory cells having a first end coupled with the first data line and a second end coupled with the second data line; a first driving unit coupled with a first voltage node, the first end of the first data line, and the first end of the second data line; and a second driving unit coupled with a second voltage node, the second end of the first data line, and the second end of the second data line, wherein the first driving unit and the second driving unit are configured to electrically couple one data line of the first data line and the second data line to the first voltage node and to electrically couple the other data line of the first data line and the second data line to the second voltage node during a time period.