Memory protection cache

摘要

Accessing data at a memory is described. A request associated with a read or write operation is received, wherein the request includes a logical address associated with the memory. A physical address is generated based at least in part on the logical address. A block of data at the memory that includes data associated with the physical address is determined. Data at the determined block of data and a corresponding set of ECC from the memory are accessed. Whether the accessed data can be decoded based at least in part on the corresponding set of ECC is determined.

主权项

1. A system for accessing data at a memory, comprising:
a processor configured to:
receive a request associated with an operation, wherein the request includes a logical address associated with the memory;determine a type of access associated with the request based at least in part on the logical address;generate a physical address based at least in part on (1) the type of access and (2) the logical address, wherein to generate the physical address based at least in part on (1) the type of access and (2) the logical address includes to:
in the even that the type of access comprises a first type of access, generate the physical address based at least in part on translating the logical address; andin the event that the type of access comprises a second type of access, generate the physical address based at least in part on not translating the logical address;determine a block of data at the memory that includes data associated with the physical address; andaccess data at the block of data and a corresponding set of ECC from the memory based at least in part on the type of access; and the memory coupled to the processor and configured to provide the processor with instructions.