Control circuit for power converter and method thereof

摘要

A control circuit for a power converter includes a pulse width modulation signal generating circuit, a power estimation circuit, and a current limiting signal generating circuit. The pulse width modulation signal generating circuit generates pulse width modulation signals according to a current sense signal and a current limiting signal for configuring the conduction status of a switch circuit of the power converter. The power estimation circuit generates a power estimation signal for estimating the power which the power converter provides to a load. The current limiting signal generating circuit generates the current limiting signal according to the power estimation signal so that the power converter may provide suitable power to the load.

主权项

1. A control circuit for a power converter, for configuring a conduction status of a switch circuit of the power converter for providing power to a load, comprising:
a current limiting signal generating circuit, configured to operably generate a current limiting signal; a pulse width modulation (PWM) signal generating circuit, configured to operably generate a PWM signal according to a current sense signal and the current limiting signal for configuring the conduction status of the switch circuit; and a power estimation circuit, configured to operably generate a power estimation signal according to the PWM signal, the current sense signal and the current limiting signal; wherein the current limiting signal generating circuit compares the power estimation signal with a predetermined power signal for generating the current limiting signal; the power estimation circuit generates the power estimation signal according to the current sense signal at a third time point and according to a difference between the current sense signal at a fourth time point and the current sense signal at a second time point; the second time point is configured to be a time point at which the PWM signal is at a predetermined portion of the total time the PWM signal maintains active; the third time point is later than the second time point with a predetermined delay time; and the fourth time point is a time point at which the PWM signal turns from active to inactive.