发明名称 Resistive random accessed memory device for FPGA configuration
摘要 A non-volatile field programmable gate array includes a logic component, a transistor device comprising a gate structure, a first impurity region, and a second impurity region, the first impurity region coupled to the reconfigurable logic component, and a resistive switching device comprising a bottom electrode coupled to the first impurity region, a top electrode spatially extending in a first direction, and a resistive switching element coupled to the top electrode and to the bottom electrode at an intersecting region between the bottom electrode and the top electrode, wherein the resistive switching device stores a resistance state from a plurality of resistance states that indicates a configuration code for the reconfigurable logic component.
申请公布号 US9059705(B1) 申请公布日期 2015.06.16
申请号 US201113174077 申请日期 2011.06.30
申请人 CROSSBAR, INC. 发明人 Edelhaeuser Frank
分类号 H03K19/177;H01L25/00 主分类号 H03K19/177
代理机构 Amin, Turocy & Watson, LLP 代理人 Amin, Turocy & Watson, LLP
主权项 1. A non-volatile field programmable gate array, comprising: a reconfigurable logic component; a transistor device coupled to the reconfigurable logic component, comprising a gate structure, a first impurity region, and a second impurity region, the first impurity region being operably coupled to the reconfigurable logic component; and a resistive switching device coupled to the transistor device and to the reconfigurable logic component, the resistive switching device comprising a bottom electrode coupled to the first impurity region, a top electrode including at least a portion comprising an active metal material spatially extending in a first direction, and a resistive switching element in physical and electrical contact with the active metal material of the top electrode and to the bottom electrode at an intersecting region between the bottom electrode and the top electrode, wherein the resistive switching device stores a resistance state from a plurality of resistance states that indicates a configuration code for the reconfigurable logic component; wherein the resistive switching element comprises an amorphous silicon material configured to allow formation of a filament structure therein, wherein the filament structure comprises a metal region comprising metal particles from the active metal material.
地址 Santa Clara CA US